LayoutId PADS2007

BeginErrorRules
DoSummary Yes
|Errorfile pcb.err
|Exclude Error Warning Note
|ExcludeNums 7129
EndErrorRules

|Levels STD
|Grounds GND
|Powers VDD VCC
|ParamAttFile pads.var
|OutLen 79
|DeviceFileName parttype.lib
|PlaceFileName lines.asc
|NetlistFileName net.asc
|PartFileName part.asc
|BackFileName back.asc
|DeviceFormat $DEVICE$
|NormalTraceWidth 12
|SignalTraceWidth 50
DoDefaultRules Yes | [No] | Controls whether the default rules section will be added
                          | to the netlist or not

| The default Netlist File header is !PADS-POWERPCB-V3 for Layout ID PADSPCB
| This can be changed by the NetFileHeader key word. 
| Note: This is applicable only for netlist (.asc) file generated while
|       going forward.
|
NetFileHeader !PADS-POWERPCB-V2007.0
|PlacementScale 1.0
Precision 2
|SignalStyle Pkgpin
|SignalStyle Strip

|DoSymLibPrefix no | [yes] Add the library name prefix to symbols
|GenSepChar "^" | Separator for internal name of generic symbols

FwdExt asc
PkgFileExt asc
DeviceFileExt p
|DeviceFileExt lib
BackExt eco
BackNetFileExt asc
PlaceFileExt asc

VirtualPinComps No | Turns on virtual pin components from
                   | Eplanner. Requires IV_VIRTUAL_PIN Decal

SuppressIdBackAnno yes | [no] | Controls the back annotation of IDs.
| DumpDict should be set to yes if back annotation of IDs are not
| required.
DumpDict yes | [no] | Controls whether dictionary files are read or
|written to the project directory.   


OverrideCompAttr no | [yes] If yes, SIGNAL and NC attributes on component will
		    | be overridden by SIGNAL and NC attributes on symbol

WriteBaf No
WriteTechFile No  | Set to [Yes] in order to High Speed designs
TechFileName rules  | Technology file name
TechFileExt  asc         | Technology file extension

DoOats No
|GenericEnable Yes | [No]	| Enables the processing of PKT files
LoadPlacementData No
WriteDeviceInfo Yes
|PassBoardOutline No
|CADLibrarySignals No
|CreateSpareGates No
|SpareInputTypes L
|SpareInputSignal GND
|PreservePrevPack Yes
|EvalParamAtts Yes


BeginAttPassList
Specific
|BeginOatAtts
COM REFDES
COM $OBJNAME
COM PADS_ID
COM SYMTAG
COM PKG_LOCK

NET  PADS_ID
PIN #
NET $OBJNAME
|EndOatAtts

PIN PINTYPE
PKG PKG_TYPE
PKG PKGORDER
PKG PKG_GRP  | Required for REUSE_BLOCK
PKG ALT_PKG_LST


NET NC   | Suppresses pcb Warning 6083: Single pin net
PIN NC   | Suppresses pcb: Warning 6094: Pin not connected

NET PCBCLASS  | For pcb class assignment
NET DIFF_PAIR | For diff pair assignment

General
BOARD UNIT
PKG VALUE
PKG TOLERANCE
PKG HYPERLYNX.MODEL
PKG PART_NUMBER
PKG DESCRIPTION
PKG COST
PKG MANUFACTURER_#1
PKG MANUFACTURER_#2
PKG ASSEMBLY_OPTIONS
PKG GEOMETRY.HEIGHT
PKG SI_MODEL_FILE
PKG SI_MODEL
PKG IBIS
PKG CTX_PN | Modified by jthom 050407
PKG DESC
PKG DEVICE
PKG FOOTPRINT
PKG LEAD_FREE_STATUS
PKG MFG
PKG MFG_PN
PKG ROHS_STATUS
PKG VALUE
PKG VENDOR
PKG VENDOR_PN
PKG PINSWAP | Modified by jthom 071607

NET POWERGROUND
NET VOLTAGE
NET DFT.NAIL_COUNT_PER_NET

NET Planning.Scheduled DontBackAnno

PPN DFT.NAIL_DIAMETER
PPN DFT.NAIL_NUMBER

|COM NAME  | This is a system attribute used by the constraint management systems.  Do no use this attribute
COM PINSWAP
COM NC
COM SIGNAL
COM HETERO
COM DEVICE
COM GATESWAP
COM GLUE
COM ROTATION

PKG CLASS
PKG GLUE
PKG ROTATION
PKG QUAD_MODEL

| PowerPCB Design Rules

| Differential Pair rules
NET DIFFPAIR_MIN_LENGTH
NET DIFFPAIR_MAX_LENGTH
NET DIFFPAIR_GAP
NET DIFFPAIR_MAX_OBSTACLE_SIZE
NET DIFFPAIR_MAX_OBSTACLE_NUMBER
NET DIFFPAIR_RESTRICT_LAYER_CHANGE
NET DIFFPAIR_ALLOW_SPLIT_AROUND_OBSTACLES
NET DIFFPAIR_WIDTH

| Routing Rules
NET LENGTH_MINIMIZATION_TYPE
NET PIN_SHARE
NET SMD_SHARE
NET VIA_SHARE
NET TRACE_SHARE
NET AUTO_ROUTE
NET ROUTE_PRIORITY
NET RIPUP
NET SHOVE
NET SHOVE_PROTECTED
NET VALID_LAYER
NET VALID_VIA_TYPE
NET MAX_NUMBER_OF_VIAS

|High Speed Rules
NET MIN_LENGTH
NET MAX_LENGTH
NET STUB_LENGTH
NET PARALLEL_LENGTH
NET PARALLEL_GAP
NET TANDEM_LENGTH
NET TANDEM_GAP
NET MIN_PROPDELAY
NET MAX_PROPDELAY
NET MIN_CAPACITANCE
NET MAX_CAPACITANCE
NET MIN_IMPEDANCE
NET MAX_IMPEDANCE
NET AGGRESSOR
NET SHIELD_NET
NET SHIELD_GAP
NET MATCH_LENGTH
NET MATCH_LENGTH_TOLERANCE


|Clearance Rules
NET TRACK_TO_TRACK
NET VIA_TO_TRACK
NET VIA_TO_VIA
NET PAD_TO_TRACK
NET PAD_TO_VIA
NET PAD_TO_PAD
NET SMD_TO_TRACK
NET SMD_TO_VIA
NET SMD_TO_PAD
NET SMD_TO_SMD
NET COPPER_TO_TRACK
NET COPPER_TO_VIA
NET COPPER_TO_PAD
NET COPPER_TO_SMD
NET COPPER_TO_COPPER
NET TEXT_TO_TRACK
NET TEXT_TO_VIA
NET TEXT_TO_PAD
NET TEXT_TO_SMD
NET OUTLINE_TO_TRACK
NET OUTLINE_TO_VIA
NET OUTLINE_TO_PAD
NET OUTLINE_TO_SMD
NET OUTLINE_TO_COPPER
NET DRILL_TO_TRACK
NET DRILL_TO_VIA
NET DRILL_TO_PAD
NET DRILL_TO_SMD
NET DRILL_TO_COPPER
NET SAME_NET_SMD_TO_VIA
NET SAME_NET_SMD_TO_CRN
NET SAME_NET_VIA_TO_VIA
NET SAME_NET_PAD_TO_CRN
NET MIN_TRACK_WIDTH
NET REC_TRACK_WIDTH
NET MAX_TRACK_WIDTH
NET DRILL_TO_DRILL
NET BODY_TO_BODY
NET SAME_NET_TRACK_TO_CRN


|Component Rules
PKG TRACK_TO_TRACK
PKG VIA_TO_TRACK
PKG VIA_TO_VIA
PKG PAD_TO_TRACK
PKG PAD_TO_VIA
PKG PAD_TO_PAD
PKG SMD_TO_TRACK
PKG SMD_TO_VIA
PKG SMD_TO_PAD
PKG SMD_TO_SMD
PKG TEXT_TO_TRACK
PKG TEXT_TO_VIA
PKG TEXT_TO_PAD
PKG TEXT_TO_SMD
PKG OUTLINE_TO_PAD
PKG OUTLINE_TO_SMD
PKG DRILL_TO_TRACK
PKG DRILL_TO_VIA
PKG DRILL_TO_PAD
PKG DRILL_TO_SMD
PKG SAME_NET_SMD_TO_VIA
PKG SAME_NET_SMD_TO_CRN
PKG SAME_NET_PAD_TO_CRN
PKG MIN_TRACK_WIDTH
PKG REC_TRACK_WIDTH
PKG MAX_TRACK_WIDTH
PKG RESTRICTED_VIA_TYPE

EndAttPassList


BeginAlsRules
PIN PINTYPE=IN     PINTYPE=L
PIN PINTYPE=OUT    PINTYPE=S
PIN PINTYPE=OEM    PINTYPE=O
PIN PINTYPE=OCL    PINTYPE=C
PIN PINTYPE=BI     PINTYPE=B
PIN PINTYPE=TRI    PINTYPE=T
PIN PINTYPE=ANALOG PINTYPE=U
PIN PINTYPE=TERM   PINTYPE=Z
PIN PINTYPE=POWER  PINTYPE=P
PIN PINTYPE=GROUND PINTYPE=G

PKG CLASS=R        CLASS=RES
PKG CLASS=RP       CLASS=RES
PKG CLASS=VR       CLASS=RES
PKG CLASS=IC       CLASS=TTL
|PKG CLASS=SMD      CLASS=TTL
|PKG CLASS=MOS      CLASS=TTL
|PKG CLASS=CMOS     CLASS=CMO
|PKG CLASS=ECL      CLASS=ECL
|PKG CLASS=ANALOG   CLASS=ANA
|PKG CLASS=DISCRETE CLASS=ANA
|PKG CLASS=ADC      CLASS=ANA
|PKG CLASS=DAC      CLASS=ANA
|PKG CLASS=POT      CLASS=ANA
|PKG CLASS=FILT     CLASS=ANA
PKG CLASS=C        CLASS=CAP
PKG CLASS=P-C      CLASS=CAP
|PKG CLASS=DIODE    CLASS=DIO
|PKG CLASS=SDIODE   CLASS=DIO
|PKG CLASS=ZENER    CLASS=ZEN
|PKG CLASS=FET      CLASS=TRX
|PKG CLASS=NPN      CLASS=TRX
|PKG CLASS=PNP      CLASS=TRX
|PKG CLASS=TRANSFOR CLASS=XFR
|PKG CLASS=L        CLASS=CHO
PKG CLASS=IO       CLASS=CON
|PKG CLASS=SCR      CLASS=SCR
|PKG CLASS=SWITCH   CLASS=SWI
|PKG CLASS=CRYSTAL  CLASS=UND

PKG PKG_TYPE=8PDIP  PKG_TYPE=DIP8
PKG PKG_TYPE=14PDIP PKG_TYPE=DIP14
PKG PKG_TYPE=16PDIP PKG_TYPE=DIP16
PKG PKG_TYPE=18PDIP PKG_TYPE=DIP18
PKG PKG_TYPE=20PDIP PKG_TYPE=DIP20
PKG PKG_TYPE=CAP    PKG_TYPE=CAP\MA20
PKG PKG_TYPE=RES    PKG_TYPE=R1/4W
PKG PKG_TYPE=4PSIP  PKG_TYPE=SIP\4P
PKG PKG_TYPE=5PSIP  PKG_TYPE=SIP\5P
PKG PKG_TYPE=6PSIP  PKG_TYPE=SIP\6P
PKG PKG_TYPE=7PSIP  PKG_TYPE=SIP\7P
PKG PKG_TYPE=8PSIP  PKG_TYPE=SIP\8P
PKG PKG_TYPE=9PSIP  PKG_TYPE=SIP\9P
PKG PKG_TYPE=10PSIP PKG_TYPE=SIP\10P
PKG PKG_TYPE=11PSIP PKG_TYPE=SIP\11P
PKG PKG_TYPE=12PSIP PKG_TYPE=SIP\12P
PKG PKG_TYPE=TO-220AB PKG_TYPE=TO-220
PKG PKG_TYPE=DO-7   PKG_TYPE=DO7
PKG PKG_TYPE=DO-35  PKG_TYPE=DO35
PKG PKG_TYPE=DO-41  PKG_TYPE=DO41
PKG PKG_TYPE=HC     PKG_TYPE=XTAL1
PKG PKG_TYPE=28JLCC PKG_TYPE=CC28
PKG PKG_TYPE=44JLCC PKG_TYPE=CC44
PKG PKG_TYPE=68JLCC PKG_TYPE=CC68
PKG PKG_TYPE=18PLCC PKG_TYPE=CCR18
PKG PKG_TYPE=68PGA  PKG_TYPE=PGA\68P
PKG PKG_TYPE=68PLP  PKG_TYPE=PGA\68P
PKG PKG_TYPE=68LPP  PKG_TYPE=PGA\68P

|PKG VALUE Value
|PKG TOLERANCE Tolerance
PKG HYPERLYNX.MODEL Hyperlynx.Model
PKG PART_NUMBER "Part Number"
PKG DESCRIPTION Description
PKG COST Cost
PKG MANUFACTURER_#1 "Manufacturer #1" 
PKG MANUFACTURER_#2 "Manufacturer #2" 
PKG SI_MODEL_FILE   Hyperlynx.Library
PKG SI_MODEL	  Hyperlynx.Model
PKG IBIS		  Hyperlynx.Model

NET POWERGROUND PowerGround
NET VOLTAGE Voltage
PKG GEOMETRY.HEIGHT Geometry.Height
NET DFT.NAIL_COUNT_PER_NET "DFT.Nail Count Per Net"
PPN DFT.NAIL_DIAMETER "DFT.Nail Diameter"
PPN DFT.NAIL_NUMBER "DFT.Nail Number"

|Component Rules
PKG TRACK_TO_TRACK Rules.Clearance.Trace.Trace
PKG VIA_TO_TRACK   Rules.Clearance.Via.Trace
PKG VIA_TO_VIA     Rules.Clearance.Via.Via
PKG PAD_TO_TRACK   Rules.Clearance.Pad.Trace
PKG PAD_TO_VIA     Rules.Clearance.Pad.Via
PKG PAD_TO_PAD     Rules.Clearance.Pad.Pad
PKG SMD_TO_TRACK   Rules.Clearance.SMD.Trace
PKG SMD_TO_VIA     Rules.Clearance.SMD.Via
PKG SMD_TO_PAD     Rules.Clearance.SMD.Pad
PKG SMD_TO_SMD     Rules.Clearance.SMD.SMD
PKG TEXT_TO_TRACK  Rules.Clearance.Text.Trace
PKG TEXT_TO_VIA    Rules.Clearance.Text.Via
PKG TEXT_TO_PAD    Rules.Clearance.Text.Pad
PKG TEXT_TO_SMD    Rules.Clearance.Text.SMD
PKG OUTLINE_TO_PAD Rules.Clearance.Board.Pad
PKG OUTLINE_TO_SMD Rules.Clearance.Board.SMD
PKG DRILL_TO_TRACK Rules.Clearance.Drill.Trace
PKG DRILL_TO_VIA   Rules.Clearance.Drill.Via
PKG DRILL_TO_PAD   Rules.Clearance.Drill.Pad
PKG DRILL_TO_SMD   Rules.Clearance.Drill.SMD
PKG SAME_NET_SMD_TO_VIA Rules.SameNet.SMD.Via
PKG SAME_NET_SMD_TO_CRN Rules.SameNet.SMD.Crn
PKG SAME_NET_PAD_TO_CRN Rules.SameNet.Pad.Crn
PKG MIN_TRACK_WIDTH     Rules.Width.Minimum
PKG REC_TRACK_WIDTH     Rules.Width.Recommended
PKG MAX_TRACK_WIDTH     Rules.Width.Maximum
PKG RESTRICTED_VIA_TYPE Rules.Routing.RestrictedVias.00000

EndAlsRules

BeginChkRules

| obj_type = { PIN, SPN, COM, SYM, NET, PKG, PPN, ANY, SYMCOM, etc. }
| severity = { ERR, WRN, NOT }


|******************************************************************
| CHKVAL syntax: CHKVAL routine_name obj_type attr_name severity 
|                       fixcode [arguments]
|    routine_nam = _NAME_CHK _LIST_CHK _ENUM_CHK _FND_CHAR _SIG_CHK
|                  _DUMMY_CHK _REG_EXP
|    attr_name = anything $OBJNAME $ATTNAME $ANY $DEFAULT
|
| NAME_CHK: checks for illegal character and length violations
|    Arguments: string replacement_char min_len max_len
|    string = legal_chars or ~illegal_chars (\t\n\r allowed)
|    max_len = * for none
|    fixcodes: 0=nothing, 1=replace_chars, 2=truncate, 3=replace_chars
|              and truncate
|
| !@#$%^&()_+|\-=[]:"~;'`<>?/ are legal characters in PADS
| Mixed-case values are forced to upper case. Refdes and #
| may not use mixed case values due to the possibility of
| creating conflicts.
CHKVAL _NAME_CHK PPN    $OBJNAME   ERR 0 "~{}*,. \t\n\r" "" 1 4
CHKVAL _NAME_CHK SYMCOM REFDES     ERR 0 "~a-z{}*,.` \t\n\r" "" 1 15
CHKVAL _NAME_CHK SYMCOM DEVICE     ERR 0 "~\\{}*,.` \t\n\r@" "" 1 40
CHKVAL _NAME_CHK SYMCOM PKG_TYPE   ERR 0 "~{}*,.` \t\n\r" "" 1 40
CHKVAL _NAME_CHK SYMCOM CLASS      ERR 0 "~{}*,.` \t\n\r" "" 1 *
CHKVAL _NAME_CHK SYM    Value      ERR 0 "~{}*,` \t\n\r@" "" 0 *
CHKVAL _NAME_CHK COM    Value      ERR 0 "~{}*,` \t\n\r@" "" 1 *
CHKVAL _NAME_CHK SYM    Tolerance  ERR 0 "~{}*,` \t\n\r@" "" 0 *
CHKVAL _NAME_CHK COM    Tolerance  ERR 0 "~{}*,` \t\n\r@" "" 1 *
CHKVAL _NAME_CHK SYMCOM ROTATION   ERR 0 "0-9." "" 1 7
CHKVAL _NAME_CHK NET    TRACEWIDTH ERR 0 "0-9" "" 1 3
CHKVAL _NAME_CHK NET    $OBJNAME   ERR 0 "~{}*, \t\n\r" "" 1 47
CHKVAL _NAME_CHK NET    "\"DFT.Nail Count Per Net\""  ERR 1 "0-9" "1" 1 6
CHKVAL _NAME_CHK NETCOM  PCBCLASS ERR 0 "~{}*,` \t\n\r@" "" 1 15

| LIST_CHK: same as NAME_CHK, but does bus (list) expansion for
|    a list of values
|    fixcode: 0=nothing

CHKVAL _LIST_CHK SPN    #          ERR 0 "~a-z{}*,. \t\n\r" "" 1 4
CHKVAL _LIST_CHK SYMCOM NC         ERR 0 "~{}*,.` \t\n\r" "" 1 4
CHKVAL _LIST_CHK SYMCOM PKGORDER   ERR 0 "~{}*,.` \t\n\r" "" 1 4
CHKVAL _LIST_CHK SYMCOM HETERO     ERR 0 "~." "" 1 *

| ENUM_CHK: check for an enumerated set of values
|    fixcode: 0=nothing

CHKVAL _ENUM_CHK SPNPIN PINTYPE    ERR 0  L S O C B T U L Z P G
CHKVAL _ENUM_CHK SYMCOM GLUE       ERR 0  TRUE FALSE
CHKVAL _ENUM_CHK SYMCOM GATESWAP   ERR 0  TRUE FALSE
CHKVAL _ENUM_CHK NET PowerGround   ERR 0  YES NO

| FND_CHAR: require a certain character (anywhere in string)
|    fixcodes: 0=nothing, 1=add character

CHKVAL _FND_CHAR SYM    REFDES  ERR 1 ?
CHKVAL _FND_CHAR NET GROUP   ERR 0 :
CHKVAL _FND_CHAR NET GROUP   ERR 0 .

| SIG_CHK: applies NET $OBJNAME checking to the string before ';'
|    and PPN $OBJNAME checking to the string after ';'.  The severity
|    specified here is not actually used
|    fixcode: 0=nothing

CHKVAL _SIG_CHK SYMCOM SIGNAL   ERR 0


|******************************************************************
| GENVAL syntax: GENVAL routine_name obj_type attr_name [arguments]
| DFLT_VAL: just uses the specified default value

GENVAL _DFLT_VAL SYM REFDES U?

| UNIQ_NUM: appends a unique number to an optional prefix
|           Arguments: [prefix] [start_number]

GENVAL _UNIQ_NUM NET $OBJNAME N

|******************************************************************
| ALLOW_DUPL syntax: ALLOW_DUPL obj_type attr_name

ALLOW_DUPL SYMCOM SIGNAL
ALLOW_DUPL SYMCOM NC
ALLOW_DUPL SYMCOM PINSWAP


|******************************************************************
| REQUIRE syntax: REQUIRE obj_type attr_name severity fixcode


REQUIRE SPN #         ERR 0
REQUIRE SYMCOM REFDES ERR 1


|******************************************************************
| CHKBRD syntax: CHKBRD routine_name severity fixcode [arguments]


CHKBRD _DUPL_ATTR   ERR 0  | Duplicate attribute
CHKBRD _BAD_SLOTCNT ERR 0  | Conflicting number of slots
|CHKBRD _DUPL_PINS   ERR 0  | SIGNAL, NC, # conflicts
CHKBRD _DUPL_PINS   WRN 0  | SIGNAL, NC, # conflicts | Modified by jthom 050407
CHKBRD _BAD_PINSWAP ERR 0  | Bad PINSWAP attribute

CHKBRD _BAD_PIN_NUM ERR 1  | Component pin # not on symbol, 1=repack
CHKBRD _BAD_SIG_NUM ERR 0  | Component signal pin # not on symbol, 1=add it
CHKBRD _ILL_PINSWAP WRN 0  | Illegal pin swap
CHKBRD _MIXED_SLOT  ERR 1  | Pins from different slots on component, 1=repack

CHKBRD _SGL_PIN_NET WRN 0  | Single pin net
                           | 0 = Pass single pin nets to netlist
						   | 1 = Filter all single pin nets from netlist
						   | 2 = Filter single pin nets with the NET NC attribute
						   |     from netlist
|CHKBRD _PIN_SHORTED NOT 0  | Pins shorted
CHKBRD _DUPL_FNAME1 ERR 0  | Duplicate component name
|CHKBRD _DUPL_FNAME2 ERR 0  | Component name duplicates a refdes
CHKBRD _DUPL_RNAME  WRN 0  | Duplicate Viewplace refdes
CHKBRD _DUPL_NNAME  WRN 0  | Duplicate net name

CHKBRD _REF_CONFL   ERR 1  | Refdes has conflicting attributes, 1=repack
CHKBRD _DEV_CONFL   ERR 1  | Refdes has conflicting devices, 1=repack
CHKBRD _DUPL_SLOT   ERR 1  | Duplicate slots, 1=repack
|CHKBRD _COMM_PIN1   NOT 1  | Common pins, same nets, some unconnected, 1=repack
CHKBRD _COMM_PIN1   WRN 1  | Common pins, same nets, some unconnected, 1=repack | Modified by jthom 050407
|CHKBRD _COMM_PIN2   ERR 1  | Common pins, different nets, 1=repack
CHKBRD _COMM_PIN2   WRN 1  | Common pins, different nets, 1=repack | Modified by jthom 050407
|CHKBRD _COMM_PIN3   ERR 1  | Common pins, different attributes, 1=repack
CHKBRD _COMM_PIN3   WRN 1  | Common pins, different attributes, 1=repack | Modified by jthom 050407
CHKBRD _COMM_PIN4   ERR 1  | Common pins, net overrides SIGNAL, 1=repack
CHKBRD _UNUSED_SLOT NOT 0  | Unused slot
CHKBRD _UNCON_PIN   WRN 0  | Unconnected pin, 1=Add unique NCPKGPIN net
CHKBRD _VDVP_PKG    NOT 1  | Viewdraw or Viewplace added or deleted package, 
			   |     1=update from Viewdraw
CHKBRD _VDVP_SHP    NOT 1  | Viewdraw or Viewplace shape changed,
			   |     1=update from Viewdraw
CHKBRD _VDVP_NET    NOT 1  | Viewdraw or Viewplace net on pin changed,
			   |     1=update from Viewdraw
CHKBRD _VDVP_ATT    NOT 1  | Viewdraw or Viewplace attribute changed,
			   |     1=update from Viewdraw
CHKBRD _MISSING_PIN NOT 0  | Viewdraw pin not found in Viewplace/Viewdraw
CHKBRD _EXTRA_PIN   NOT 0  | Viewplace/Viewdraw pin not found in Viewdraw
CHKBRD _DUPL_HETPIN ERR 0  | Duplicate pins between hetero 3 symbols
CHKBRD _INCHETPKG   WRN 0  | Hetero symbol missing from Hetero package
CHKBRD _PDB_ILL_PINSWAP WRN 0  | Illegal pin swap with Central Library PDB
CHKBRD _PDB_PIN_MAP WRN 0  | Illegal pin mappins with Central Library PDB
CHKBRD _PDB_PARTS_LOC_PDB WRN 0  | Invalid part definitions in Local PDB


| Don't ever change the following line!!!
CHKBRD _BAD_HETERO  ERR 0  | Bad heterogeneous package
CHKBRD _HETERO_ATT  ERR 0  | Heterogeneous device attribute conflicts

FIX_SEVERITY NOT

FIRST_REFDES 1

EndChkRules
